1. Field
Exemplary embodiments of the present invention relate to a semiconductor technology, and more particularly, to a variable resistance memory device that stores data using a variable resistance material having different resistance states depending on an applied voltage.
2. Description of the Related Art
Variable resistance memory devices such as ReRAM (Resistive Random Access Memory) and PCRAM (Phase-change Random Access Memory) have been developed. These variable resistance memory devices have a structure in which a variable resistance material layer switching between different resistance states depending on an applied voltage is interposed between two electrodes for applying a voltage across the variable resistance material layer.
Such variable resistance memory devices may be roughly divided into two modes depending on switching characteristics. The modes include a unipolar mode where a set/reset operation occurs with one polarity and a bipolar mode where a set/reset operation occurs with different polarities. Since a variable resistance memory device switching in the bipolar mode exhibits a uniform switching characteristic and performs a reset operation through an electric field, the variable resistance memory device has desirable features such as having a small reset current. FIG. 1 is diagram illustrating the operation of a variable resistance memory device operating in the bipolar mode.
Referring to FIG. 1, an operation where a variable resistance memory device in a high resistance state HRS changes to a low resistance state LRS is referred to as a set operation, and a voltage applied during the set operation is referred to as a set voltage Vset. On the other hand, an operation where a variable resistance memory device in the low resistance state LRS changes to the high resistance state HRS is referred to as a reset operation, and a voltage applied during the reset operation is referred to as a reset voltage Vreset.
Here, the set voltage Vset and the reset voltage Vreset have similar magnitudes while having different polarities from each other. For example, when the set voltage Vset is a negative voltage, the reset voltage Vreset may be a positive voltage having a similar magnitude.
According to an example, when such a variable resistance memory device is in the low resistance state LRS, data ‘1’ is stored therein. Here, when the variable resistance memory device is in the high resistance state HRS, data ‘0’ may be stored therein. That is, the variable resistance memory device switching between the low resistance state LRS and the high resistance state HRS may store one-bit data of 0 or 1.
However, with the increase in integration degree of semiconductor memory devices, implementing multi-level cell capable of storing two or more-bit data therein has been requested. The implementation of the multi-level cell is also requested in the field of variable resistance memory devices. However, since most variable resistance materials have, for example, only two resistance states, it is difficult to implement a multi-level cell.